ddu7f doc #97016 data delay devices, inc. 1 1/29/97 3 mt. prospect ave. clifton, nj 07013 10-tap, ttl-interfaced fixed delay line (series ddu7f) features packages ten equally spaced outputs fits standard 14-pin dip socket low profile auto- insertable input & outputs fully ttl interfaced & buffered 10 t 2 l fan-out capability functional description the ddu7f-series device is a 10-tap digitally buffered delay line. the signal input (in) is reproduced at the outputs (t1-t10), shifted in time by an amount determined by the device dash number. the nominal tap-to-tap delay increment is given by 1/10 of the dash number. for dash numbers less than 50, the total delay of the line is measured from t1 to t10, with the nominal value given by 9 times the increment. the inherent delay from in to t1 is nominally 3.5ns. for dash numbers greater than or equal to 50, the total delay of the line is measured from in to t10, with the nominal value given by the dash number. series specifications minimum input pulse width: 20% of total delay output rise time: 2ns typic al supply voltage: 5vdc 5% supply current: i ccl = 50ma typical i cch = 15ma typical operating temperature: 0 to 70 c temp. coefficient of total delay: 100 ppm/ c 10% 10% 10% 10% vcc gnd in t1 t2 t3 t4 t10 functional diagram for dash numbers < 50 3.5ns 10% 10% 10% 10% t5 t6 t7 t8 10% t9 10% 10% 10% 10% vcc gnd in t1 t2 t3 t4 t10 functional diagram for dash numbers >= 50 10% 10% 10% 10% t5 t6 t7 t8 10% t9 10% 1997 data delay devices data delay devices, inc. 3 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 in t2 t4 t6 t8 t10 n/c gnd vcc t1 t3 t5 t7 t9 n/c n/c 14 13 12 11 10 9 8 1 2 3 4 5 6 7 in n/c t2 t4 t6 t8 gnd vcc t1 t3 t5 t7 t9 t10 ddu7f-xx dip ddu7f-xxa2 gull-wing ddu7f-xxb2 j-lead ddu7f-xxm military dip military smd ddu7f-xxmc3 pin descriptions in signal input t1-t10 tap outputs vcc +5 volts gnd ground dash number spec.?s part number total delay ( ns) delay per tap ( ns) DDU7F-10 9 2.0 * 1.0 0.5 ddu7f-20 18 2.0 * 2.0 1.0 ddu7f-25 22.5 2.0 * 2.5 1.0 ddu7f-50 50 2.5 5.0 2.0 DDU7F-100 100 5.0 10.0 3.0 ddu7f-150 150 7.5 15.0 3.0 ddu7f-200 200 10.0 20.0 3.0 ddu7f-250 250 12.5 25.0 3.0 ddu7f-300 300 15.0 30.0 3.0 ddu7f-400 400 20.0 40.0 4.0 ddu7f-500 500 25.0 50.0 5.0 * total delay is referenced to first tap input to first tap = 3.5ns 1ns note: any dash number between 10 and 500 not shown is also available.
ddu7f doc #97016 data delay devices, inc. 2 1/29/97 tel: 973-773-2299 fax: 973-773-9672 http://www.datadelay.com application notes high frequency response the ddu7f tolerances are guaranteed for input pulse widths and periods greater than those specified in the test conditions. although the device will function properly for pulse widths as small as 20% of the total delay and periods as small as 40% of the total delay (for a symmetric input), the delays may deviate from their values at low frequency. however, for a given input condition, the deviation will be repeatable from pulse to pulse. contact technical support at data delay devices if your application requires device testing at a specific input condition. power supply bypassing the ddu7f relies on a stable power supply to produce repeatable delays within the stated tolerances. a 0.1uf capacitor from vcc to gnd, located as close as possible to the vcc pin, is recommended. a wide vcc trace and a clean ground plane should be used. device specifications table 1: absolute maximum ratings parameter symbol min max units notes dc supply voltage v cc -0.3 7.0 v input pin voltage v in -0.3 v cc +0.3 v storage temperature t strg -55 150 c lead temperature t lead 300 c 10 sec table 2: dc electrical characteristics (0c to 70c, 4.75v to 5.25v) parameter symbol min typ max units notes high level output voltage v oh 2.5 3.4 v v cc = min, i oh = max v ih = min, v il = max low level output voltage v ol 0.35 0.5 v v cc = min, i ol = max v ih = min, v il = max high level output current i oh -1.0 ma low level output current i ol 20.0 ma high level input voltage v ih 2.0 v low level input voltage v il 0.8 v input clamp voltage v ik -1.2 v v cc = min, i i = i ik input current at maximum input voltage i ihh 0.1 ma v cc = max, v i = 7.0v high level input current i ih 20 m a v cc = max, v i = 2.7v low level input current i il -0.6 ma v cc = max, v i = 0.5v short-circuit output current i os -60 -150 ma v cc = max output high fan-out 25 unit output low fan-out 12.5 load
ddu7f doc #97016 data delay devices, inc. 3 1/29/97 3 mt. prospect ave. clifton, nj 07013 package dimensions ddu7f-xx (commercial dip) .780 max. 1 2 3 4 5 6 7 8 14 13 12 11 10 9 .290 max. .015 typ. .070 max. .018 typ. .600 .010 6 equal spaces each .100 .010 non-accumulative .280 max. .350 max. .010 .002 lead material: nickel-iron alloy 42 tin plate ddu7f-xxm (military dip) .195 .010 .830 max. 1 2 3 4 5 6 7 8 .290 max. .020 typ. .440 max. .300 typ. .010 typ. .600 typ. .030 .005 9 10 11 12 13 14 ddu7f-xxa2 (commercial gull-wing) .790 max. .430 typ. .020 typ. .040 typ. .100 .090 .600 .300 max. .270 typ. .010 typ. .050 typ. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 ddu7f-xxb2 (commercial j-lead) .790 max. 1 2 3 4 5 6 7 8 .320 typ. .020 typ. .040 typ. .100 .110 .600 .350 max. .270 typ. .050 typ. .110 typ. 9 10 11 12 13 14 .880 .020 .882 .005 .020 typ. .040 typ. .100 .090 .700 .280 max. .590 max. .010 .002 .050 .010 .710 .005 .007 .005 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 ddu7f-xxmc3 (military gull-wing)
ddu7f doc #97016 data delay devices, inc. 4 1/29/97 tel: 973-773-2299 fax: 973-773-9672 http://www.datadelay.com delay line automated testing test conditions input: output: ambient temperature: 25 o c 3 o c load: 1 fast-ttl gate supply voltage ( vcc): 5.0v 0.1v c load : 5pf 10% input pulse: high = 3.0v 0.1v threshold: 1.5v (rising & falling) low = 0.0v 0.1v source impedance: 50 w max. rise/fall time: 3.0 ns max. (measured between 0.6v and 2.4v ) pulse width: pw in = 1.5 x total delay period: per in = 10 x total delay note: the above conditions are for test only and do not in any way restrict the operation of the device. t1 out trig in ref trig test setup device under test (dut) time interval counter pulse generator computer system printer in t2 t3 t4 t5 t6 t7 t8 t9 t10 timing diagram for testing t rise t fall per in pw in t rise t fall 0.6v 0.6v 1.5v 1.5v 2.4v 2.4v 1.5v 1.5v v ih v il v oh v ol input signal output signal
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